1. Technical Field of the Invention
The present invention relates to a system and method for eliminating defects at an interface between a stop layer and an integral layered dielectric.
2. Description of the Related Art
Semiconductor devices, such as complementary metal-oxide semiconductor transistors, are used in applications requiring high-speed and low power. These transistors, commonly used in microprocessors, memory devices, and gate arrays, for example, may be fabricated by conventional manufacturing methods. One method begins by bonding silicon dioxide layers to a silicon substrate. A plasma current then selectively exposes selected silicon dioxide layers creating exposed silicon sectors partitioned by a non-etched area. The exposed silicon sectors are then implanted with impurities to create a source and a drain. A conductive layer is deposited between the source and the drain creating a gate. Additional conductive layers disposed between the source and the drain provide electrical conductivity to ancillary elements. These layers also provide bonding pads to facilitate external connections. The bonding pads commonly connected to a transistor by conductive and interlayer connections are often separated by dielectric material. There are, of course, many other steps to manufacturing semiconductor devices.
As circuits are commonly etched in layers, silicon substrates often need to be isolated. A known method for accomplishing silicon substrate isolation disposes a nitride stop layer above a silicon substrate and a first integral layered dielectric. Thereafter, a second integral layered dielectric is disposed above the nitride stop layer. A problem that may occur at the interface of the nitride stop layer and the second integral layered dielectric is the creation of small bubble-like defects 10 that become exaggerated at the surface of the second integral layered dielectric 20 as illustrated in FIG. 1. These defects may affect semiconductor reliability and may create poison contact faults.
A known method for eliminating these small bubble-like defects 10 utilizes a wet cleaning technique that subjects a semiconductor wafer to an RCA (Radio Corporation of America) wet cleaning process and then submerses the semiconductor wafer in a hydroflouride dip. Wet cleaning techniques, however, may create pinhole defects on thin nitride layers. Additionally, wet cleaning techniques result in longer cycle times and require additional wafer handling that can lead to wafer contamination and lower semiconductor yields.
With growing requirements of improved reliability, reduced cost, increased yields, and simplified manufacturing processes, there is a demand for a system and a method that eliminates defects between the stop layer and the second integral layered dielectric. The system and method should reduce or eliminate defects at an interface of the nitride stop layer and the second integral layered dielectric. It should further provide a system and method that is compatible with existing semiconductor fabrication technology.